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PD - 94099A
IRFP32N50K
SMPS MOSFET
Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting torque, 6-32 or M3 screw
HEXFET(R) Power MOSFET
VDSS
500V
RDS(on)typ.
0.135
ID
32A
TO-247AC
Max.
32 20 130 460 3.7 30 13 -55 to + 150 300
Units
A W W/C V V/ns
C 10lb*in (1.1N*m)
Avalanche Characteristics
Symbol
EAS IAR EAR
Parameter
Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
450 32 46
Units
mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.26 --- 40
Units
C/W
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1
05/24/01
IRFP32N50K
Static @ TJ = 25C (unless otherwise specified)
Symbol V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.54 --- V/C Reference to 25C, ID = 1mA --- 0.135 0.16 VGS = 10V, ID = 32A 3.0 --- 5.0 V VDS = V GS, ID = 250A --- --- 50 A VDS = 500V, VGS = 0V --- --- 250 A VDS = 400V, VGS = 0V, TJ = 150C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 14 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 28 120 48 54 5280 550 45 5630 155 265 Max. Units Conditions --- S VDS = 50V, ID = 32A 190 ID = 32A 59 nC VDS = 400V 84 VGS = 10V --- VDD = 250V --- ID = 32A ns --- RG = 4.3 --- VGS = 10V --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Diode Characteristics
Symbol IS
ISM
VSD trr Qrr IRRM ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Reverse RecoveryCurrent Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- 32 A 130
--- --- 1.5 V --- 530 800 ns --- 9.0 13.5 C --- 30 --- A Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = 32A, V GS = 0V TJ = 25C, IF = 32A di/dt = 100A/s
D
S
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Starting TJ = 25C, L = 0.87mH, RG = 25,
IAS = 32A,
ISD 32A, di/dt 197A/s, VDD V(BR)DSS,
TJ 150C
2
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IRFP32N50K
1000
VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
I D, Drain-to-Source Current (A)
100
I D, Drain-to-Source Current (A)
10
10
5.0V
1
1
0.1
5.0V 20s PULSE WIDTH Tj = 25C
20s PULSE WIDTH Tj = 150C
0.1 100 0.1 1 10 100
0.01 0.1 1 10
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance (Normalized)
1000
3.0
ID = 32A
I D , Drain-to-Source Current (A)
2.5
100
TJ = 150 C
2.0
10
1.5
TJ = 25 C
1
1.0
0.5
0.1 4 5 7 8
V DS = 50V 20s PULSE WIDTH 9 11 12
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFP32N50K
100000 V GS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd
20
VGS , Gate-to-Source Voltage (V)
SHORTED
ID = 32A
16
10000
V DS = 400V V DS = 250V V DS = 100V
C, Capacitance(pF)
Ciss
12
1000
Coss
100
8
4
Crss
10 1 10 100 1000
0 0 40 80 120 160 200
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R
DS(on)
TJ = 150 C
ID , Drain Current (A)
100
100
10us
10
TJ = 25 C
1
100us
10
0.1 0.2
V GS = 0 V
0.6 0.9 1.3 1.6
1
TC = 25 C TJ = 150 C Single Pulse 10ms
10 100 1000 10000
1ms
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFP32N50K
35 30
VDS VGS RG
RD
D.U.T.
+
ID , Drain Current (A)
25 20 15 10 5 0 25 50 75 100 125 150
-VDD
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
VDS 90%
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01
0.01
SINGLE PULSE (THERMAL RESPONSE)
0.001 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01 1
PDM t1 t2
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFP32N50K
800
EAS , Single Pulse Avalanche Energy (mJ)
640
TOP BOTTOM ID 14A 20A 32A
VDS L
1 5V
480
D R IV E R
320
RG
20V
D .U .T
IA S
+ V - DD
A
160
tp
0 .0 1
Fig 12c. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
Starting T J , Junction Temperature ( C)
Fig 12a. Maximum Avalanche Energy Vs. Drain Current
tp
V (B R )D SS
IAS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit
Fig 13b. Basic Gate Charge Waveform
6
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IRFP32N50K
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFP32N50K
TO - 247 Package Outline
Dimensions are shown in millimeters (inches)
3.65 (.1 43) 3.55 (.1 40) 0.25 (.0 10) M -A5 .50 (.217) 20 .30 (.800) 19 .70 (.775) 1 2 3 -C14.8 0 (.5 83) 14.2 0 (.5 59) 4.3 0 (.1 70) 3.7 0 (.1 45)
L EA D A S SIG N M E N TS 1 2 3 4 G A TE D R AIN S O UR C E D R AIN
-DDBM 5 .30 (.209 ) 4 .70 (.185 ) 2.5 0 (.08 9) 1.5 0 (.05 9) 4
1 5.90 (.62 6) 1 5.30 (.60 2) -B-
2X
5.50 (.21 7) 4.50 (.17 7)
N O TES : 1 DIM EN S IO N IN G & TO LE R AN C IN G P ER AN S I Y1 4.5M , 1 98 2. 2 CO N TR O LL IN G DIM EN S IO N : IN CH . 3 CO N F O RM S TO JED E C O U TLINE TO -2 47 -A C .
2.40 (.09 4) 2.00 (.07 9) 2X 5.45 (.2 15) 2X
1.4 0 (.0 56) 3 X 1.0 0 (.0 39) 0.2 5 (.0 10) M 3 .40 (.133 ) 3 .00 (.118 ) C AS
0.80 (.03 1) 3X 0.40 (.01 6) 2.60 (.1 02) 2.20 (.0 87)
Part Marking Information
TO-247AC
E X A M P L E : TH IS IS A N IR F P E 3 0 W ITH A S S E M B L Y L O T C O DE 3A1 Q
A
IN TE R N A TIO N A L R E C TIF IE R LO G O ASSEM BLY L OT CO DE
PART N UMB ER IR F P E 3 0 3A1 Q 93 02 D A TE C O D E (Y YW W ) YY = YEA R W W W EE K
This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/01
8
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